Optimizing the Multicore Processor for Search and Analytics



Multicore processors are now ubiquitous.  Modern datacenters in particular use multicore processors for running a diversity of workloads.  As the number of cores in a typical processor keeps growing, operators consolidate more services on a single server.  In this project, I am looking for an undergraduate student to research the interference among multiple services due to scheduling on the same server. Our focus in especially on interference in the cache hierarchy.  We will then investigate novel approaches to mitigate interference.  More specifically, we are interested in exploiting emerging memory technologies to enable large on-chip caches. The student will work with an architectural simulator.


Required: Strong interest in programming and modeling new hardware structures in C++

Required: Some experience with Linux and knowledge of caches and memory (fundamentals)


Some funding is available for excellent (undergraduate) students. I especially encourage BAC R&D students to get in touch.


Intel (Belgium)

Google (USA)



See recent work on search and persistent memory on my webpage: https://shbakram.github.io/

Updated:  10 August 2021/Responsible Officer:  Dean, CECS/Page Contact:  CECS Marketing